β Scribed by Samar K. Saha (Author)
No coin nor oath required. For personal study only.
To surmount the continuous scaling challenges of MOSFET devices, FinFETs have emerged as the real alternative for use as the next generation device for IC fabrication technology. The objective of this book is to provide the basic theory and operating principles of FinFET devices and technology, an overview of FinFET device architecture and manufacturing processes, and detailed formulation of FinFET electrostatic and dynamic device characteristics for IC design and manufacturing. Thus, this book caters to practicing engineers transitioning to FinFET technology and prepares the next generation of device engineers and academic experts on mainstream device technology at the nanometer-nodes.
1. Introduction
1.1 Fin Field-Effect Transistors
1.2 Overview of MOSFET Devices for Integrated Circuit Manufacturing
1.3 Alternative Device Concepts
1.4 FinFET Devices for VLSI Circuits and Systems
1.5 A Brief History of FinFET Devices
1.6 Summary
References
2. Fundamentals of Semiconductor Physics
2.1 Introduction
2.2 Semiconductor Physics
2.3 Theory of n-type and p-Type Semiconductors in Contact
2.4 Summary
References
3. Multiple Gate Metal-Oxide-Semiconductor (MOS) System
3.1 Introduction
3.2 Multigate MOS Capacitors at Equilibrium
3.3 MOS Capacitor under Applied Bias
3.4 Multigate MOS Capacitor Systems: Mathematical Analysis
3.5 Quantum Mechanical Effect
3.6 Summary
References
4. Overview of FinFET Device Technology
4.1 Introduction
4.2 FinFET Manufacturing Technology
4.3 Bulk-FinFET Fabrication
4.4 SOI FinFET Process Flow
4.5 Summary
References
5. Long Channel FinFETs
5.1 Introduction
5.2 Basic Features of FinFET Devices
5.3 FinFET Device Operation
5.4 Drain Current Formulation
5.5 Summary
References
6. Small Geometry FinFETs: Physical Effects on Device Performance
6.1 Introduction
6.2 Short-channel Effects on Threshold Voltage
6.3 Quantum Mechanical Effects
6.4 Surface Mobility
6.5 High Field Effects
6.6 Output Resistance
6.7 Summary
References
7. Leakage Currents in FinFETs
7.1 Introduction
7.2 Subthreshold Leakage Currents
7.3 Gate-Induced Drain and Source Leakage Currents
7.4 Impact Ionization Current
7.5 Source-Drain pn-Junction Leakage Current
7.6 Gate Oxide Tunneling Currents
7.7 Summary
References
8. Parasitic Elements in FinFETs
8.1 Introduction
8.2 Source-Drain Parasitic Resistance
8.3 Gate Resistance
8.4 Parasitic Capacitance Elements
8.5 Source-Drain pn-Junction Capacitance
8.6 Summary
References
9. Challenges of FinFET Process and Device Technology
9.1 Introduction
9.2 Process Technology Challenges
9.3 Device Technology Challenges
9.4 Challenges in FinFET Circuit Design
9.5 Summary
References
10. FinFET Compact Modeling for Circuit Simulation
10.1 Introduction
10.2 Compact Device Model
10.3 Common Multiple-Gate Compact FinFET Model
10.4 Dynamic Model
10.5 Process Variability Modeling
10.6 Summary
References
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