<span>This textbook provides readers with a comprehensive introduction to various noise sources that significantly reduce performance and reliability in nanometer-scale integratedΒ circuits. TheΒ author covers different types of noise, such as crosstalk noise caused by signal switching of adjacent wir
Nanoscale VLSI: Devices, Circuits and Applications
β Scribed by Rohit Dhiman, Rajeevan Chandel
- Publisher
- Springer Singapore;Springer
- Year
- 2020
- Tongue
- English
- Leaves
- 319
- Series
- Energy Systems in Electrical Engineering
- Edition
- 1st ed.
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
This book describes methodologies in the design of VLSI devices, circuits and their applications at nanoscale levels. The book begins with the discussion on the dominant role of power dissipation in highly scaled devices.The 15 Chapters of the book are classified under four sections that cover design, modeling, and simulation of electronic, magnetic and compound semiconductors for their applications in VLSI devices, circuits, and systems. This comprehensive volume eloquently presents the design methodologies for ultraβlow power VLSI design, potential postβCMOS devices, and their applications from the architectural and system perspectives. The book shall serve as an invaluable reference book for the graduate students, Ph.D./ M.S./ M.Tech. Scholars, researchers, and practicing engineers working in the frontier areas of nanoscale VLSI design.
β¦ Table of Contents
Front Matter ....Pages i-xiii
Front Matter ....Pages 1-1
Low-Voltage Analog Integrated Circuit Design (Deepika Gupta)....Pages 3-22
Design Methodology for Ultra-Low-Power CMOS Analog Circuits for ELF-SLF Applications (Soumya Pandit)....Pages 23-43
Orthogonally Controllable VQO for Low-Voltage Applications (Bhartendu Chaturvedi, Jitendra Mohan, Atul Kumar)....Pages 45-63
Low Power Design Techniques for Integrated Circuits (Bipin Chandra Mandi)....Pages 65-80
Front Matter ....Pages 81-81
Bilayer Graphene Nanoribbon Tunnel FET for Low-Power Nanoscale IC Design (Vobulapuram Ramesh Kumar, Uppu Madhu Sai Lohith, Shaik Javid Basha, M. Ramana Reddy)....Pages 83-100
A Threshold Voltage Model for SiGe Source/Drain Silicon-Nanotube-Based Junctionless Field-Effect Transistor (Anchal Thakur, Rohit Dhiman)....Pages 101-112
III-V Nanoscale Quantum-Well Field-Effect Transistors for Future High-Performance and Low-Power Logic Applications (J. Ajayan, D. Nirmal)....Pages 113-137
FinFET: A Beginning of Non-planar Transistor Era ( Kajal, Vijay Kumar Sharma)....Pages 139-159
Front Matter ....Pages 161-161
Gallium NitrideβEmerging Future Technology for Low-Power Nanoscale IC Design (Sahil Sankhyan, Tarun Chaudhary, Gargi Khanna, Rajeevan Chandel)....Pages 163-171
A Low-Power Hybrid VS-CNTFET-CMOS Ring Voltage-Controlled Oscillator Using Current Starved Power Switching Technology (Ashish Raman, Vikas Kumar Malav, Ravi Ranjan, R. K. Sarin)....Pages 173-202
Chip-Level Optical Interconnect in Electro-optics Platform (Sajal Agarwal, Y. K. Prajapati)....Pages 203-223
Emerging Graphene FETs for Next-Generation Integrated Circuit Design (Yash Agrawal, Eti Maheshwari, Mekala Girish Kumar, Rajeevan Chandel)....Pages 225-237
Front Matter ....Pages 239-239
Power and Area-Efficient Architectural Design Methodology for Nanomagnetic Computation (Santhosh Sivasubramani, Sanghamitra Debroy, Amit Acharyya)....Pages 241-270
Design Space Exploration of DSP Hardware Using Adaptive PSO and Bacterial Foraging for Power/Area-Delay Trade-Off (Anirban Sengupta, Mahendra Rathor, Pallabi Sarkar)....Pages 271-293
Register-Transfer-Level Design for Application-Specific Integrated Circuits (Dilip Singh, Rajeevan Chandel)....Pages 295-319
β¦ Subjects
Engineering; Circuits and Systems; Electronics and Microelectronics, Instrumentation; Nanotechnology and Microengineering
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