𝔖 Bobbio Scriptorium
✦   LIBER   ✦

Fabrication of 100 nm polysilicon-emitter transistors using e-beam lithography

✍ Scribed by M.N. Webster; A. Tuinhout; A.H. Verbruggen; J. Romijn; S. Radelaar; B. Lo¨chel; H.F.F. Jos; P.M.A. Moors

Publisher
Elsevier Science
Year
1995
Tongue
English
Weight
862 KB
Volume
27
Category
Article
ISSN
0167-9317

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Fabrication of sub-10-nm Au–Pd structure
Fabrication of sub-10-nm Au–Pd structures using 30 keV electron beam lithography and lift-off
✍ F Lehmann; G Richter; T Borzenko; V Hock; G Schmidt; L.W Molenkamp 📂 Article 📅 2003 🏛 Elsevier Science 🌐 English ⚖ 494 KB

We report the fabrication of 6-nm Au-Pd structures using 30-keV e-beam lithography in a standard double-layer poly(methylmethacrylate) resist on silicon and subsequent lift-off. Line arrays with periods as small as 27 nm were realized. Details of the processing are presented and the dependence of th

Sub-100 nm T-gate fabrication using
Sub-100 nm T-gate fabrication using a positive resist ZEP520/P(MMA-MAA)/PMMA trilayer by double exposure at 50 kV e-beam lithography
✍ S.C Kim; B.O Lim; H.S Lee; D.-H Shin; S.K Kim; H.C Park; J.K Rhee 📂 Article 📅 2004 🏛 Elsevier Science 🌐 English ⚖ 366 KB

Recent advances in electron beam lithography have made possible the fabrication of pseudomorphic high electron mobility transistors (PHEMTs) with gate length well in the nanometer regime. This gate processes mostly require thin dielectric support layers in order to prevent collapse of gate head due