Sub-100 nm T-gate fabrication using a positive resist ZEP520/P(MMA-MAA)/PMMA trilayer by double exposure at 50 kV e-beam lithography
✍ Scribed by S.C Kim; B.O Lim; H.S Lee; D.-H Shin; S.K Kim; H.C Park; J.K Rhee
- Publisher
- Elsevier Science
- Year
- 2004
- Tongue
- English
- Weight
- 366 KB
- Volume
- 7
- Category
- Article
- ISSN
- 1369-8001
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✦ Synopsis
Recent advances in electron beam lithography have made possible the fabrication of pseudomorphic high electron mobility transistors (PHEMTs) with gate length well in the nanometer regime. This gate processes mostly require thin dielectric support layers in order to prevent collapse of gate head due to poor mechanical reliability in the narrow gate foot. However, this layer is a major cause for parasitic capacitance. In this paper, we have demonstrated the fabrication of a 70 nm foot print of the T-shaped gate by using a positive resist ZEP520/P(MMA-MAA)/PMMA trilayer by double exposure method without a thin dielectric supporting layer on the substrate.