✦ LIBER ✦

Experimental investigation of the impact of LWR on sub-100-nm device performance

✍ Scribed by Hyun-Woo Kim; Ji-Young Lee; Shin, J.; Sang-Gyun Woo; Han-Ku Cho; Joo-Tae Moon

Book ID: 114617648
Publisher: IEEE
Year: 2004
Tongue: English
Weight: 714 KB
Volume: 51
Category: Article
ISSN: 0018-9383
DOI: 10.1109/ted.2004.839115

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Probing the limits of optical lithograph

Probing the limits of optical lithography: The fabrication of sub-100nm devices with 193nm wavelength lithography

✍ R.A. Cirelli; J. Bude; F. Houlihan; A. Gabor; G.P. Watson; G.R. Weber; F.P. Klem 📂 Article 📅 2000 🏛 Elsevier Science 🌐 English ⚖ 721 KB

We discuss the fabrication of a FLASH EEPROM floating gate memory device with a cell size of 0.0896~m. The floating gate level utilized an alternating aperture phase shift mask, a binary mask was used to expose the control gate level. Linewidth changes over topography, due to reflectivity variations

Gate-source-drain architecture impact on

Gate-source-drain architecture impact on DC and RF performance of sub-100-nm elevated source/drain NMOS transistors

✍ Jeamsaksiri, W.; Jurczak, M.; Grau, L.; Linten, D.; Augendre, E.; De Potter, M.; 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 684 KB

The impact of high-κ gate dielectrics an

The impact of high-κ gate dielectrics and metal gate electrodes on sub-100 nm MOSFETs

✍ Cheng, B.; Cao, M.; Rao, R.; Inani, A.; Vande Voorde, P.; Greene, W.M.; Stork, J 📂 Article 📅 1999 🏛 IEEE 🌐 English ⚖ 259 KB

Impact of impedance-dependent receiver g

Impact of impedance-dependent receiver gain on the extracted channel thermal noise in sub-100 nm MOSFETs

✍ Chen, Chih-Hung; Lei, Peiming; Liang, Chia Wen 📂 Article 📅 2013 🏛 Elsevier Science 🌐 English ⚖ 837 KB

[IEEE 31st European Solid-State Device R

[IEEE 31st European Solid-State Device Research Conference - Nuremberg, Germany (2001.9.11-2001.9.13)] 31st European Solid-State Device Research Conference - The Impact of High-K Gate Dielectrics on Sub 100 nm CMOS Circuit Performance

✍ Mohapatra, N.R.; Desai, M.P.; Narendra, S.G.; V. Ramgopal Rao, 📂 Article 📅 2001 🏛 IEEE ⚖ 123 KB

Analytical and experimental investigatio

Analytical and experimental investigation on the hydrodynamic performance of onshore wave-power devices

✍ D.J. Wang; M. Katory; Y.S. Li 📂 Article 📅 2002 🏛 Elsevier Science 🌐 English ⚖ 203 KB

The hydrodynamic performance of the oscillating water column type shoreline-mounted wave-power device is numerically studied within linear wave theory by using a boundary element method based on the Wehausen and Laitone 3D shallow water Green's function. In order to verify the numerical model, a 1:1