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Effects of low gate bias annealing in NBT stressed p-channel power VDMOSFETs

✍ Scribed by I. Manić; D. Danković; S. Djorić-Veljković; V. Davidović; S. Golubović; N. Stojadinović

Book ID
104058060
Publisher
Elsevier Science
Year
2009
Tongue
English
Weight
375 KB
Volume
49
Category
Article
ISSN
0026-2714

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Threshold voltage instabilities in p-channel power VDMOSFETs under pulsed NBT stress
✍ N. Stojadinović; D. Danković; I. Manić; A. Prijić; V. Davidović; S. Djorić-Veljk 📂 Article 📅 2010 🏛 Elsevier Science 🌐 English ⚖ 697 KB

Threshold voltage instabilities induced in p-channel power VDMOSFETs by pulsed negative bias temperature stressing are presented and compared with corresponding instabilities found after the static NBT stress. Degradation observed under the pulsed stress conditions depends on the frequency and duty