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Dynamic state traversal for sequential circuit test generation

✍ Scribed by Hsiao, Michael S.; Rudnick, Elizabeth M.; Patel, Janak H.


Book ID
121231596
Publisher
Association for Computing Machinery
Year
2000
Tongue
English
Weight
135 KB
Volume
5
Category
Article
ISSN
1084-4309

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Sequential circuit test generation by re
✍ Kazunori Hikone; Mitsuji Ikeda; Kazumi Hatayama; Terumine Hayashi πŸ“‚ Article πŸ“… 1993 πŸ› John Wiley and Sons 🌐 English βš– 921 KB

## Abstract This paper presents a test generation method using an optimization technique for a single stuck‐at fault in synchronous sequential circuits. This method utilizes a new real number simulation for defining the cost of an input pattern for a given fault and leads an input pattern to a test