Devices’ optimization against hot-carrier degradation in high voltage pLEDMOS transistor
✍ Scribed by Hong Wu; Qinsong Qian; Siyang Liu; Weifeng Sun; Longxing Shi
- Book ID
- 104058104
- Publisher
- Elsevier Science
- Year
- 2010
- Tongue
- English
- Weight
- 683 KB
- Volume
- 50
- Category
- Article
- ISSN
- 0026-2714
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## Abstract The degradation produced by channel hot‐carrier (CHC) on short channel transistors with high‐k dielectric has been analyzed. For short channel transistors (__L__<0.15 µm), the most damaging stress condition has been found to be __V__~G~=__V__~D~ instead of the ‘classical’ __V__~G~=__V__
A comparison between pMOS and nMOS short channel transistors with high-k dielectric subjected to channel hot-carrier (CHC) stress is presented. Smaller CHC degradation is observed in pMOS devices. At high temperature, the CHC degradation increases for pMOS and nMOS. The temperature dependence of the