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Channel hot-carrier degradation in pMOS and nMOS short channel transistors with high-k dielectric stack

✍ Scribed by E. Amat; T. Kauerauf; R. Degraeve; R. Rodríguez; M. Nafría; X. Aymerich; G. Groeseneken

Book ID
104052387
Publisher
Elsevier Science
Year
2010
Tongue
English
Weight
319 KB
Volume
87
Category
Article
ISSN
0167-9317

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✦ Synopsis

A comparison between pMOS and nMOS short channel transistors with high-k dielectric subjected to channel hot-carrier (CHC) stress is presented. Smaller CHC degradation is observed in pMOS devices. At high temperature, the CHC degradation increases for pMOS and nMOS. The temperature dependence of the CHC degradation has been explained, for both transistor types, by considering a larger influence of a bias temperature instability (BTI)-related component of the total CHC induced degradation.

📜 SIMILAR VOLUMES

Simulation of the hot-carrier degradatio
Simulation of the hot-carrier degradation in short channel transistors with high-K dielectric
✍ E. Amat; T. Kauerauf; R. Degraeve; R. Rodríguez; M. Nafría; X. Aymerich; G. Groe 📂 Article 📅 2010 🏛 John Wiley and Sons 🌐 English ⚖ 302 KB

## Abstract The degradation produced by channel hot‐carrier (CHC) on short channel transistors with high‐k dielectric has been analyzed. For short channel transistors (__L__<0.15 µm), the most damaging stress condition has been found to be __V__~G~=__V__~D~ instead of the ‘classical’ __V__~G~=__V__