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Compact modeling and fast simulation of on-chip interconnect lines

✍ Scribed by Ioan, D.; Ciuprina, G.; Radulescu, M.; Seebacher, E.

Book ID: 114650981
Publisher: IEEE
Year: 2006
Tongue: English
Weight: 299 KB
Volume: 42
Category: Article
ISSN: 0018-9464
DOI: 10.1109/tmag.2006.871466

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