✦ LIBER ✦

Comments on "Fault Testing and Diagnosis in Combinational Digital Circuits"

✍ Scribed by Dwyer, T.F.

Book ID: 114587581
Publisher: IEEE
Year: 1969
Tongue: English
Weight: 155 KB
Volume: C-18
Category: Article
ISSN: 0018-9340
DOI: 10.1109/t-c.1969.222761

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Comments on "Fault Folding for Irredunda

Comments on "Fault Folding for Irredundant and Redundant Combinational Circuits

✍ Ng, Y. W.; Avizienis, A. 📂 Article 📅 1976 🏛 IEEE 🌐 English ⚖ 181 KB

Dynamic Fault Diagnosis of Combinational

Dynamic Fault Diagnosis of Combinational and Sequential Circuits on Reconfigurable Hardware

✍ Fatih Kocan; Daniel G. Saab 📂 Article 📅 2007 🏛 Springer US 🌐 English ⚖ 338 KB

Multiple fault diagnosis in combinationa

Multiple fault diagnosis in combinational circuits using sensitizing input-pairs

✍ Nobuhiro Yanagida; Hiroshi Takahashi; Yuzo Takamatsu 📂 Article 📅 1995 🏛 John Wiley and Sons 🌐 English ⚖ 940 KB

Modeling and testing for stuck faults in

Modeling and testing for stuck faults in BiCMOS combinational circuits

✍ Asad A. Ismaeel; Rakesh Bhatnagar 📂 Article 📅 1997 🏛 Elsevier Science 🌐 English ⚖ 968 KB

A transistor level model and a testing methodology are presented for BiCMOS circuits. The model fully describes the functional (logical) grad parametric behavior of the 13iCMOS circuits in the presence of transistor stuck faults. Tile model employs the logic transistor function (LTF). The LTF descri

Comments on "The Error Latency of a Faul

Comments on "The Error Latency of a Fault in a Sequential Digital Circuit"

✍ David, R.; Tellez-Giron, R. 📂 Article 📅 1979 🏛 IEEE 🌐 English ⚖ 343 KB

A study on the development of an automat

A study on the development of an automatic fault diagnosis system for testing nuclear power plant digital electronic circuits

✍ Dae Sik Kim; Poong Hyun Seong 📂 Article 📅 1993 🏛 Elsevier Science 🌐 English ⚖ 516 KB