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Analytical Gate Capacitance Modeling of III–V Nanowire Transistors

✍ Scribed by Marin, Enrique G.; Ruiz, Francisco J. Garcia; Tienda-Luna, Isabel Maria; Godoy, Andres; Gamiz, Francisco

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

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✍ Wunnicke, Olaf 📂 Article 📅 2006 🏛 American Institute of Physics 🌐 English ⚖ 432 KB

Analytical model for the threshold volta

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Performance Evaluation of III–V Nanowire

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Gate Capacitance Modeling and Diameter-D

✍ Yeonghun Lee; Kakushima, K.; Natori, K.; Iwai, H. 📂 Article 📅 2012 🏛 IEEE 🌐 English ⚖ 811 KB

Modelling and optimization of III/V tran

✍ Christian Larsen; Mats Ärlelid; Erik Lind; Lars-Erik Wernersson 📂 Article 📅 2010 🏛 Elsevier Science 🌐 English ⚖ 696 KB