✦ LIBER ✦

Analysis and optimization of BiCMOS gate circuits

✍ Scribed by Kuroda, T.; Sakata, Y.; Matsuo, K.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Analysis and optimization of BiCMOS digi

✍ Embabi, S.H.K.; Bellaouar, A.; Elmasry, M.I. 📂 Article 📅 1991 🏛 IEEE 🌐 English ⚖ 319 KB

Performance optimization of BiCMOS circu

✍ Tsunenori Yamauchi; Yoshinori Okajima; Kazuhide Kurosaki 📂 Article 📅 1997 🏛 John Wiley and Sons 🌐 English ⚖ 813 KB

Testability analysis and fault modeling

✍ D. Al-Khalili; C. Rozon; B. Stewart 📂 Article 📅 1992 🏛 Springer US 🌐 English ⚖ 859 KB

Design and optimization of buffer chains

✍ Elrabaa, M.S.; Elmasry, M.I. 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 867 KB

Analysis and optimization of series-gate

✍ Sharaf, K.M.; Elmasry, M.I. 📂 Article 📅 1996 🏛 IEEE 🌐 English ⚖ 954 KB

Delay time sensitivity analysis of multi

✍ Rofail, S.S.; Seng, Y.K.; Seng, S.Y. 📂 Article 📅 1997 🏛 The Institution of Electrical Engineers 🌐 English ⚖ 685 KB