๐”– Bobbio Scriptorium
โœฆ   LIBER   โœฆ

A Unified Co-Processor Architecture for Matrix Decomposition

โœ Scribed by Yong Dou; Jie Zhou; Gui-Ming Wu; Jing-Fei Jiang; Yuan-Wu Lei; Shi-Ce Ni


Publisher
Springer
Year
2010
Tongue
English
Weight
630 KB
Volume
25
Category
Article
ISSN
1000-9000

No coin nor oath required. For personal study only.


๐Ÿ“œ SIMILAR VOLUMES


An integrated co-processor architecture
โœ Holger Bock; Wolfgang Mayerwieser; Karl C. Posch; Reinhard Posch; Volker Schindl ๐Ÿ“‚ Article ๐Ÿ“… 1997 ๐Ÿ› Elsevier Science ๐ŸŒ English โš– 551 KB

A prototype VLSI design for a new smartcard co-processor for fast modular arithmetic with long integers is described. We present design criteria, objectives for selecting algorithms, the co-processor's structure, and some implementation details. Emphasis is also put on the manifold constraints which

An architecture for a VLSI FFT processor
โœ Joseph Ja'Ja'; Robert Michael Owens ๐Ÿ“‚ Article ๐Ÿ“… 1983 ๐Ÿ› Elsevier Science ๐ŸŒ English โš– 682 KB