✦ LIBER ✦

A subnanosecond clock Josephson 4-bit processor

✍ Scribed by Kotani, S.; Imamura, T.; Hasuo, S.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A 4-bit Josephson data processor chip

✍ Hatano, Y.; Yano, S.; Mori, H.; Yamada, H.; Hirano, M.; Kawabe, U. 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 817 KB

A subnanosecond Josephson 16-bit ALU

✍ Kotani, S.; Fujimaki, N.; Imamura, T.; Hasuo, S. 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 800 KB

Nb multilayer planarization technology f

✍ Nagasawa, S.; Wada, Y.; Tsuge, H.; Hidaka, M.; Ishida, I.; Tahara, S. 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 598 KB

A 4-bit×4-bit multiplier and 3-bit count

✍ Hatano, Y.; Harada, Y.; Yamashita, K.; Tarutani, Y.; Kawabe, U. 📂 Article 📅 1987 🏛 IEEE 🌐 English ⚖ 1007 KB

A Josephson 4 bit RALU for a prototype c

✍ Nakagawa, H.; Kosaka, S.; Kawamura, H.; Kurosawa, I.; Aoyagi, M.; Hamazaki, Y.; 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 978 KB

A 280-ps Josephson 4-bitx4-bit parallel

✍ Sone, J.; Tsai, J.; Abe, H. 📂 Article 📅 1985 🏛 IEEE 🌐 English ⚖ 939 KB