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A structured testability approach for multi-chip modules based on BIST and boundary-scan : Yervant Zorian. IEEE Transactions on Components, Packaging, and Manufacturing Technology—Part B, 17, 3, 283 (August 1994)

Publisher: Elsevier Science
Year: 1996
Tongue: English
Weight: 112 KB
Volume: 36
Category: Article
ISSN: 0026-2714
DOI: 10.1016/0026-2714(96)81941-x

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