✦ LIBER ✦

A single-chip 24-GHz differential I/Q receiver in 0.18-μm CMOS technology

✍ Scribed by Chi-Chen Chen; Chuan-Wei Tsou; Yo-Sheng Lin

Publisher: John Wiley and Sons
Year: 2011
Tongue: English
Weight: 937 KB
Volume: 53
Category: Article
ISSN: 0895-2477
DOI: 10.1002/mop.26351

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✦ Synopsis

Abstract

This article describes a monolithic complementary metal‐oxide‐semiconductor field‐effect‐transistor (CMOS) direct‐conversion receiver (DCR) comprising a low‐noise amplifier, two sub‐harmonic mixers (SHMs), three miniature quadrature couplers (QCs), three miniature baluns, and two intermediate frequency (IF) amplifiers.The SHMs in conjunction with the QCs and baluns are used to eliminate local oscillator (LO) self‐mixing. The circuit was fabricated in a 0.18‐μm CMOS process for 24‐GHz application. At an radio frequency (RF) of 24 GHz and IF frequency of 100 MHz, the DCR dissipates 62.6 mW and exhibits reflection coefficient at RF port smaller than −10 dB for frequencies 10.6∼31.6 GHz, a phase mismatch of 0.22° ∼ 5.18° (the phases of differential in‐phase/quadrature IF outputs are 0°, 95.18°, 176.85°, and 270.22°), a noise figure of 9.1 dB, and a conversion gain of 31.8 dB. In addition, excellent isolations were also achieved. The corresponding LO‐IF, RF‐IF, and LO‐RF isolations are −40, −65.5, and −50.9 dB, respectively, at 24 GHz. The chip area is only 1.6 × 0.67 mm^2^, i.e., 1.07 mm^2^, excluding the test pads. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:2593–2601, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26351

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