## Abstract A 5.2 GHz, 0.43 V voltage‐controlled oscillator (VCO) is designed and implemented in a 0.18 μm CMOS 1P6M process. The designed circuit topology consists of two parallel LC resonators in series with the gates of negative differential resistance transistors. At the supply voltage of 0.43
A 24-GHz VCO using active FET frequency doubler in 0.18-μm CMOS technology
✍ Scribed by X.-S. Chen; Y.-T. Chen; C.-L. Lu; H.-R. Chuang
- Publisher
- John Wiley and Sons
- Year
- 2009
- Tongue
- English
- Weight
- 429 KB
- Volume
- 51
- Category
- Article
- ISSN
- 0895-2477
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✦ Synopsis
Abstract
In this article, a 24‐GHz VCO composed of a 12‐GHz VCO and an active frequency doubler is presented. This work is implemented by using the 0.18‐μm 1P6M CMOS process. The VCO and active frequency doubler with a 1.5 V supply consume 30 mA. The phase noise of measurement is −107.5 dBc/Hz and −123.1 dBc/Hz at 1‐MHz and 10‐MHz offset, respectively. A tuning range of 2.3 GHz is achieved by using varactor. The measurement shows a good efficiency of translation of frequency doubler and the oscillator has a good figure of merit (FOM) of −180 dBc/Hz. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 940–942, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24238
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