✦ LIBER ✦

A low jitter 0.3-165 MHz CMOS PLL frequency synthesizer for 3 V/5 V operation

✍ Scribed by Yang, H.C.; Lee, L.K.; Co, R.S.

Book ID: 119774702
Publisher: IEEE
Year: 1997
Tongue: English
Weight: 101 KB
Volume: 32
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.563681

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A 10-bit 70 MHz 3.3 V CMOS 0.5 μm D/A co

A 10-bit 70 MHz 3.3 V CMOS 0.5 μm D/A converter for video applications

✍ Fraval, A.; Dell'ova, F. 📂 Article 📅 1995 🏛 IEEE 🌐 English ⚖ 397 KB

A 0.6 V low-power 3.5-GHz CMOS low noise

A 0.6 V low-power 3.5-GHz CMOS low noise amplifier for WIMAX applications

✍ Jeng-Han Tsai; Yi-Jhang Lin; Hao-Chun Yu 📂 Article 📅 2011 🏛 John Wiley and Sons 🌐 English ⚖ 484 KB

## Abstract In this letter, a low‐voltage and low‐power 3.5‐GHz low noise amplifier (LNA) is designed and fabricated using TSMC 0.18‐μm MS/RF complementary metal‐oxide‐semiconductor field effect transistor (CMOS) technology. The complementary current‐reused topology is utilized to achieve low dc po

A 1.5-V 0.25-μm CMOS up-converter for 3–

A 1.5-V 0.25-μm CMOS up-converter for 3–5 GHz low-power WPANs

✍ Giuseppina Sapone; Giuseppe Palmisano 📂 Article 📅 2007 🏛 John Wiley and Sons 🌐 English ⚖ 171 KB

## Abstract In this article, the measured performance of a 3–5 GHz low‐power up‐converter is presented. The circuit is based on a current‐reuse topology with resistive load. It was implemented in a standard low‐cost 0.25‐μm CMOS technology. The up‐converter achieves a 3.8‐dB power gain, an output 1

A 2-V 300-MHz 1-Mb current-sensed double

A 2-V 300-MHz 1-Mb current-sensed double-density SRAM for low-power 0.3-μm CMOS/SIMOX ASICs

✍ Shibata, N.; Wantanabe, M.; Sato, Y.; Ishihara, T.; Komine, Y. 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 430 KB

A 0.9V CMOS 3-5 Ghz broadband flat gain

A 0.9V CMOS 3-5 Ghz broadband flat gain low-noise amplifier for ultra-wide band receivers

✍ Alavi-Rad, H.; Ziabakhsh, S.; Ziabakhsh, S.; Yagoub, M. C. E. 📂 Article 📅 2013 🏛 IEEE 🌐 English ⚖ 513 KB

[IEEE 2002 IEEE Radio Frequency Integrat

[IEEE 2002 IEEE Radio Frequency Integrated Circuits Symposium RFIC - Seattle, WA, USA (2-4 June 2002)] 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280) - A low jitter 5.3-GHz 0.18-μm CMOS PLL based frequency synthesizer

✍ Ali, S.; Jain, F. 📂 Article 📅 2002 🏛 IEEE ⚖ 253 KB