✦ LIBER ✦

A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors

✍ Scribed by Karuri, K.; Chattopadhyay, A.; Xiaolin Chen, ; Kammler, D.; Ling Hao, ; Leupers, R.; Meyr, H.; Ascheid, G.

Book ID: 121276678
Publisher: IEEE
Year: 2008
Tongue: English
Weight: 890 KB
Volume: 16
Category: Article
ISSN: 1063-8210
DOI: 10.1109/TVLSI.2008.2002685

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

The design and implementation of a recon

The design and implementation of a reconfigurable processor for problems of combinatorial computation

✍ Iouliia Skliarova; António B. Ferrari 📂 Article 📅 2003 🏛 Elsevier Science 🌐 English ⚖ 414 KB

The design and implementation of a pasca

The design and implementation of a pascal-based language for array processor architectures

✍ R.H. Perrott; R.W. Lyttle; P.S. Dhillon 📂 Article 📅 1987 🏛 Elsevier Science 🌐 English ⚖ 929 KB

Design of a reconfigurable VLSI processo

Design of a reconfigurable VLSI processor for robot control based on bit-serial architecture

✍ Yoshichika Fujioka; Michitaka Kameyama 📂 Article 📅 1999 🏛 John Wiley and Sons 🌐 English ⚖ 339 KB 👁 2 views

In realization of intelligent robots with the capability of quick response to altering environments, it is necessary to reduce the operation delay time of the sensor input signal to the control output. In this article, dynamically reconfigurable multioperand multiplication-addition based on bit-seri

Design and implementation of a virtual r

Design and implementation of a virtual reconfigurable architecture for different applications of intrinsic evolvable hardware

✍ Wang, J.; Chen, Q.S.; Lee, C.H. 📂 Article 📅 2008 🏛 The Institution of Engineering and Technology 🌐 English ⚖ 823 KB

Architecture design, performance analysi

Architecture design, performance analysis and VLSI implementation of a reconfigurable shared buffer for high-speed switch/router

✍ Ling Wu; Cheng Li 📂 Article 📅 2009 🏛 John Wiley and Sons 🌐 English ⚖ 682 KB

Design and implementation of a versatile

Design and implementation of a versatile cryptographic unit for RISC processors

✍ Kazim Yumbul; Erkay Savaş; Övünç Kocabaş; Johann Großschädl 📂 Article 📅 2012 🏛 John Wiley and Sons 🌐 English ⚖ 774 KB