Architecture design, performance analysis and VLSI implementation of a reconfigurable shared buffer for high-speed switch/router

Design and implementation of a scalable

Design and implementation of a scalable switch architecture for efficient high-speed data multicasting

✍ Cheng Li; R. Venkatesan; Howard M. Heys 📂 Article 📅 2007 🏛 John Wiley and Sons 🌐 English ⚖ 576 KB

## Abstract This paper presents the design and implementation of a new scalable cell‐based multicast switch fabric for broadband communications. Using distributed control and modular design, the multicast balanced gamma switch features a scalable, high performance architecture for unicast, multicas