Design and implementation of a scalable switch architecture for efficient high-speed data multicasting

✍ Scribed by Cheng Li; R. Venkatesan; Howard M. Heys

• Publisher: John Wiley and Sons
• Year: 2007
• Tongue: English
• Weight: 576 KB
• Volume: 20
• Category: Article
• ISSN: 1074-5351
• DOI: 10.1002/dac.856

✦ Synopsis

Abstract

This paper presents the design and implementation of a new scalable cell‐based multicast switch fabric for broadband communications. Using distributed control and modular design, the multicast balanced gamma switch features a scalable, high performance architecture for unicast, multicast and combined traffic under both uniform and non‐uniform traffic conditions. The important design characteristic of the switch is that a distributed cell replication function for multicast cells is integrated into the functionality of the switch element with the self‐routing and contention resolution functions. Thus, no dedicated copy network is required. In the paper, we discuss in detail the design issues associated with the multicast functionality of the switch using 0.18 µm CMOS technology and discuss the scalability of the switch in terms of architectural, implementation, and performance scalability. Synthesized results are provided for measures of circuit complexity and timing. Copyright © 2006 John Wiley & Sons, Ltd.