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A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAM

✍ Scribed by Nambu, H.; Kanetani, K.; Idei, Y.; Masuda, T.; Higeta, K.; Ohayashi, M.; Usami, M.; Yamaguchi, K.; Kikuchi, T.; Ikeda, T.; Ohhata, K.; Kusunoki, T.; Homma, N.

Book ID: 119774319
Publisher: IEEE
Year: 1995
Tongue: English
Weight: 861 KB
Volume: 30
Category: Article
ISSN: 0018-9200
DOI: 10.1109/4.375971

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