Power reduction techniques for a 1-Mb ECL-CMOS SRAM with an access time of 550 ps and an operating frequency of 900 MHz

✍ Scribed by Ohhata, K.; Arakawa, F.; Kusunoki, T.; Nambu, H.; Kanetani, K.; Yamasaki, K.; Higeta, K.; Usami, M.; Nishiyama, M.; Yamaguchi, K.; Homma, N.; Hotta, A.

• Book ID: 119775556
• Publisher: IEEE
• Year: 2000
• Tongue: English
• Weight: 554 KB
• Volume: 35
• Category: Article
• ISSN: 0018-9200
• DOI: 10.1109/4.839916