## Abstract A 5.2 GHz, 0.43 V voltage‐controlled oscillator (VCO) is designed and implemented in a 0.18 μm CMOS 1P6M process. The designed circuit topology consists of two parallel LC resonators in series with the gates of negative differential resistance transistors. At the supply voltage of 0.43
A 0.6-V low-power armstrong VCO in 0.18 μm CMOS
✍ Scribed by Cheng-Chen Liu; Sheng-Lyang Jang; Jhao-Jhang Chen; Miin-Horng Juang
- Publisher
- John Wiley and Sons
- Year
- 2009
- Tongue
- English
- Weight
- 303 KB
- Volume
- 52
- Category
- Article
- ISSN
- 0895-2477
No coin nor oath required. For personal study only.
✦ Synopsis
Abstract
A low‐power differential voltage‐controlled oscillator (VCO) is proposed and implemented in a 0.18 μm CMOS 1P6M process. It consists of two single‐ended Armstrong oscillators via cross‐coupled transistors to obtain a differential output. At the supply voltage of 0.6 V, the output phase noise of the differential VCO is −120.02 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 3.85 GHz and the figure of merit is −188.5 dBc/Hz. Total VCO core power consumption is 2.1 mW. Tuning range is about 550 MHz, from 3.81 to 4.36 GHz, whereas the control voltage was tuned from 0 to 2.0 V. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 116–119, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24864
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