✦ LIBER ✦

8-ns CMOS 64 K×4 and 256 K×1 SRAMs

✍ Scribed by Flannagan, S.T.; Pelley, P.H.; Herr, N.; Engles, B.E.; Feng, T.; Nogle, S.G.; Eagan, J.W.; Dunnigan, R.J.; Day, L.J.; Kung, R.I.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

25-ns 256K×1/64K×4 CMOS SRAM's

✍ Kayano, S.; Ichinose, K.; Kohno, Y.; Shinohara, H.; Anami, K.; Murakami, S.; Wad 📂 Article 📅 1986 🏛 IEEE 🌐 English ⚖ 883 KB

A 35-ns 128K×8 CMOS SRAM

✍ Komatsu, T.; Taniguchi, H.; Okazaki, N.; Nishihara, T.; Kayama, S.; Hoshi, N.; A 📂 Article 📅 1987 🏛 IEEE 🌐 English ⚖ 899 KB

A 14 ns 256 K×1 CMOS SRAM with multiple

✍ Voss, P.H.; Pfennings, L.C.M.G.; Phelan, C.G.; O'Connell, C.M.; Davies, T.J.; On 📂 Article 📅 1989 🏛 IEEE 🌐 English ⚖ 634 KB

A 7.5-ns 32 K×8 CMOS SRAM

✍ Okuyama, H.; Nakano, T.; Nishida, S.; Aono, E.; Satoh, H.; Arita, S. 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 521 KB

A 25-ns low-power full-CMOS 1-Mbit (128

✍ Chu, S.T.; Dikken, J.; Hartgring, C.D.; List, F.J.; Raemaekers, J.G.; Bells, S.A 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 678 KB

A 20-ns 256 K×4 FIFO memory

✍ Hashimoto, M.; Nomura, M.; Sasaki, K.; Komatsuzaki, K.; Fujiwara, H.; Honzawa, T 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 987 KB