✦ LIBER ✦

A 14 ns 256 K×1 CMOS SRAM with multiple test modes

✍ Scribed by Voss, P.H.; Pfennings, L.C.M.G.; Phelan, C.G.; O'Connell, C.M.; Davies, T.J.; Ontrop, H.; Bell, S.A.; Salters, R.H.W.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

8-ns CMOS 64 K×4 and 256 K×1 SRAMs

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25-ns 256K×1/64K×4 CMOS SRAM's

✍ Kayano, S.; Ichinose, K.; Kohno, Y.; Shinohara, H.; Anami, K.; Murakami, S.; Wad 📂 Article 📅 1986 🏛 IEEE 🌐 English ⚖ 883 KB

A 14-ns 1-Mbit CMOS SRAM with variable b

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A 25-ns low-power full-CMOS 1-Mbit (128

✍ Chu, S.T.; Dikken, J.; Hartgring, C.D.; List, F.J.; Raemaekers, J.G.; Bells, S.A 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 678 KB

Fabrication and total dose testing of a

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A 12-ns ECL I/O 256 K×1-bit SRAM using a

✍ Kertis, R.A.; Smith, D.D.; Bowman, T.L. 📂 Article 📅 1988 🏛 IEEE 🌐 English ⚖ 575 KB