## Abstract A 5.2 GHz, 0.43 V voltage‐controlled oscillator (VCO) is designed and implemented in a 0.18 μm CMOS 1P6M process. The designed circuit topology consists of two parallel LC resonators in series with the gates of negative differential resistance transistors. At the supply voltage of 0.43
5.8-GHz CMOS T/R switches with high and low substrate resistances in a 0.18-μm CMOS process
✍ Scribed by Zhenbiao Li, ; Hyun Yoon, ; Feng-Jung Huang, ; O, K.K.
- Book ID
- 120481449
- Publisher
- IEEE
- Year
- 2003
- Tongue
- English
- Weight
- 350 KB
- Volume
- 13
- Category
- Article
- ISSN
- 1531-1309
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