✦ LIBER ✦

Variable-Latency Floating-Point Multipliers for Low-Power Applications

✍ Scribed by Shiann-Rong Kuang; Jiun-Ping Wang; Hua-Yi Hong

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Energy-Efficient Multiple-Precision Floa

✍ Shiann-Rong Kuang, Kun-Yi Wu, Kee-Khuan Yu 📂 Article 📅 2012 🏛 Springer US 🌐 English ⚖ 702 KB

Low power architecture for floating poin

✍ Pillai, R.V.K.; Al-Khalili, D.; Al-Khalili, A.J. 📂 Article 📅 2000 🏛 The Institution of Electrical Engineers 🌐 English ⚖ 216 KB

High-performance, low-latency field-prog

✍ Karlstrom, P.; Ehliar, A.; Liu, D. 📂 Article 📅 2008 🏛 The Institution of Engineering and Technology 🌐 English ⚖ 339 KB

Cellular array multiplier-divider for si

✍ Murthy, K.R. Srinivasa 📂 Article 📅 1976 🏛 Institution of Electrical Engineers ⚖ 392 KB

Low-precision DSP-based floating-point m

✍ Gavriliu, Constantina-Elena; Boncalo, Oana; Amaricai, Alexandru 📂 Article 📅 2014 🏛 The Institution of Engineering and Technology 🌐 English ⚖ 788 KB

Variable-Latency Adder (VL-Adder) Design

✍ Yiran Chen; Hai Li; Cheng-Kok Koh; Guangyu Sun; Jing Li; Yuan Xie; Roy, K. 📂 Article 📅 2010 🏛 IEEE 🌐 English ⚖ 406 KB