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Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance

✍ Scribed by Yiran Chen; Hai Li; Cheng-Kok Koh; Guangyu Sun; Jing Li; Yuan Xie; Roy, K.

Book ID: 118163391
Publisher: IEEE
Year: 2010
Tongue: English
Weight: 406 KB
Volume: 18
Category: Article
ISSN: 1063-8210
DOI: 10.1109/tvlsi.2009.2026280

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