✦ LIBER ✦

Timimg model for SDCFL digital circuits

✍ Scribed by Luis Gómez; Antonio Hernández; Antonio Núñez

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Timing analysis for DCFL/SDCFL VLSI circ

✍ L. Gómez; A. Hernández; A. Nunez 📂 Article 📅 1993 🏛 Elsevier Science ⚖ 576 KB

An empirical model to estimate power con

✍ A. Hernández; L. Gómez; A. Nunez 📂 Article 📅 1993 🏛 Elsevier Science ⚖ 269 KB

Statistical RTS model for digital circui

✍ Lucas Brusamarello; Gilson I. Wirth; Roberto da Silva 📂 Article 📅 2009 🏛 Elsevier Science 🌐 English ⚖ 441 KB

Model selection for computer simulation

✍ Fraser, D.L.; Director, S.W. 📂 Article 📅 1978 🏛 Institution of Electrical Engineers ⚖ 908 KB

Piecewise-linear timing delay modeling f

✍ Deng, A.-C. 📂 Article 📅 1988 🏛 IEEE ⚖ 562 KB

Transformer Circuits for Digital Studies

✍ Shipley, R. B.; Coleman, Dorothy; Watts, C. F. 📂 Article 📅 1962 🏛 Institute of Electrical and Electronics Engineers 🌐 English ⚖ 706 KB