✦ LIBER ✦

Test generation for embedded circuits under the transparent-scan approach

✍ Scribed by Pomeranz, I.; Reddy, S.M.

Book ID: 114448661
Publisher: The Institution of Electrical Engineers
Year: 2005
Tongue: English
Weight: 139 KB
Volume: 152
Category: Article
ISSN: 1350-2387
DOI: 10.1049/ip-cdt:20045151

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Transparent scan: a new approach to test

Transparent scan: a new approach to test generation and test compaction for scan circuits that incorporates limited scan operations

✍ Pomeranz, I.; Reddy, S.M. 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 485 KB

Test compaction methods for transition f

Test compaction methods for transition faults under transparent-scan

✍ Pomeranz, I.; Reddy, S.M. 📂 Article 📅 2009 🏛 The Institution of Engineering and Technology 🌐 English ⚖ 227 KB

Transparent DFT: a design for testabilit

Transparent DFT: a design for testability and test generation approach for synchronous sequential circuits

✍ Pomeranz, I.; Reddy, S.M. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 211 KB

[IEEE 1991, International Test Conferenc

[IEEE 1991, International Test Conference - Nashville, TN (Oct. 26-30 1991)] 1991, Proceedings. International Test Conference - A Partial Enhanced-Scan Approach to Robust Delay-Fault Test Generation for Sequential Circuits

✍ Kwang-Ting Cheng, ; Devadas, S.; Keutzer, K. 📂 Article 📅 1991 🏛 IEEE 🌐 English ⚖ 877 KB

[IEEE Comput. Soc 6th Design Automation

[IEEE Comput. Soc 6th Design Automation and Test in Europe (DATE 03) - Munich, Germany (3-7 March 2003)] 2003 Design, Automation and Test in Europe Conference and Exhibition - A new approach to test generation and test compaction for scan circuits

✍ Pomeranz, I.; Reddy, S.M. 📂 Article 📅 2003 🏛 IEEE Comput. Soc 🌐 English ⚖ 241 KB

The two volumes of this proceedings (of the Design, Automation, and Test in Europe Conference held in Munich, Germany in March 2003) feature the designers' forum in v.1 and nearly 1200 pages of proceedings in v.2. Among the topics of the designers' forum are design case studies, embedded operating s

[IEEE Comput. Soc. Press the European De

[IEEE Comput. Soc. Press the European Design and Test Conference. ED&TC 1995 - Paris, France (6-9 March 1995)] Proceedings the European Design and Test Conference. ED&TC 1995 - Gate delay fault test generation for non-scan circuits

✍ van Brakel, G.; Glaser, U.; Kerkhoff, H.G.; Vierhaus, H.T. 📂 Article 📅 1995 🏛 IEEE Comput. Soc. Press 🌐 English ⚖ 435 KB