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Systolic matrix and vector multiplication methods for signal processing

✍ Scribed by Urquhart, R.B.; Wood, D.


Book ID
118683010
Publisher
The Institution of Electrical Engineers
Year
1984
Weight
900 KB
Volume
131
Category
Article
ISSN
0143-7070

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Novel two-level pipelined linear systolic arrays for matrix vector multiplication are proposed. The number of processing elements in the proposed arrays s reduced to half of the number of' processing elements in the existing arrays. An area-time (AT) criteria is used to compare the proposed arrays w