✦ LIBER ✦

System-on-a-chip verification~methodology and techniques

✍ Scribed by Ferrari, F.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

System on a chip (SoC) and design method

✍ Joseph Borel 📂 Article 📅 2000 🏛 Elsevier Science 🌐 English ⚖ 712 KB

A hierarchical test methodology for syst

✍ Jin-Fu Li; Hsin-Jung Huang; Jeng-Bin Chen; Chih-Pin Su; Cheng-Wen Wu; Chuang Che 📂 Article 📅 2002 🏛 IEEE 🌐 English ⚖ 396 KB

Models and formal verification of multip

✍ Aske Brekling; Michael R. Hansen; Jan Madsen 📂 Article 📅 2008 🏛 Elsevier Science 🌐 English ⚖ 785 KB

Design methodology for on-chip bus archi

✍ Lee, J. 📂 Article 📅 2012 🏛 The Institution of Engineering and Technology 🌐 English ⚖ 720 KB

Asynchronous Techniques for System-on-Ch

✍ Martin, A.J.; Nystrom, M. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 588 KB

Guest editorial - testing and verificati

✍ Gizopoulos, D.; Aitken, R.C. 📂 Article 📅 2003 🏛 IEEE 🌐 English ⚖ 146 KB