Surface interface's 300 mm wafer capability
- Publisher
- Elsevier Science
- Year
- 1997
- Tongue
- English
- Weight
- 159 KB
- Volume
- 28
- Category
- Article
- ISSN
- 0026-2692
No coin nor oath required. For personal study only.
β¦ Synopsis
manufacturing and technology requirements outlined in the semiconductor industry technology roadmap for interconnect technologies." With improved planarization versus traditional coating methods, the Fairchild process solution is an excellent complement to CMP. By reducing deposition time, polishing time and pad wear during CMP, the system provides a greater cost-of-ownership adwmtage than conventional equipment. Advantages offered by the Falcon closed-bowl coating technology include a low solvent evaporation rate, which enables improved material distribution. Additiona/.ly, a controlled ambient airflow minimizes turbulence, generates no particulates during coating and provides reduced sensitivity to temperatm:e and humidity variations.
π SIMILAR VOLUMES
Most of today's IC chips are made from 200 mm or 150 mm silicon wafers. It is estimated that the transition from 200 mm to 300 mm wafers will bring a die cost saving of 30-40%. To meet their customers' needs, silicon wafer manufacturers are actively searching for cost-effective ways to manufacture 3