Abstract
Here, direct correlation between the microstructure of InAs nanowires (NWs) and their electronic transport behavior at room temperature is reported. Pure zinc blende (ZB) InAs NWs grown on SiO~2~/Si substrates are characterized by a rotational twin along their growthโdirection axis while wurtzite (WZ) InAs NWs grown on InAs (111)B substrates have numerous stacking faults perpendicular to their growthโdirection axis with small ZB segments. In transport measurements on backโgate fieldโeffect transistors (FETs) fabricated from both types of NWs, significantly distinct subthreshold characteristics are observed (I~on~/I~off~โโผโ2 for ZB NWs and โผ10^4^ for WZ NWs) despite only a slight difference in their transport coefficients. This difference is attributed to spontaneous polarization charges at the WZ/ZB interfaces, which suppress carrier accumulation at the NW surface, thus enabling full depletion of the WZ NW FET channel. 2D SilvacoโAtlas simulations are used for ZB and WZ channels to analyze subthreshold current flow, and it is found that a polarization charge density of โฅ10^13^โcm^โ2^ leads to good agreement with experimentally observed subthreshold characteristics for a WZ InAs NW given surfaceโstate densities in the 5โรโ10^11^โ5โรโ10^12^โcm^โ2^ range.