Stress and Strain Engineering at Nanoscale in Semiconductor Devices

✍ Scribed by Chinmay K. Maiti

Publisher: CRC Press
Year: 2021
Tongue: English
Leaves: 275
Edition: 1
Category: Library

No coin nor oath required. For personal study only.

✦ Synopsis

Anticipating a limit to the continuous miniaturization (More-Moore), intense research efforts are being made to co-integrate various functionalities (More-than-Moore) in a single chip. Currently, strain engineering is the main technique used to enhance the performance of advanced semiconductor devices. Written from an engineering applications standpoint, this book encompasses broad areas of semiconductor devices involving the design, simulation, and analysis of Si, heterostructure silicongermanium (SiGe), and III-N compound semiconductor devices. The book provides the background and physical insight needed to understand the new and future developments in the technology CAD (TCAD) design at the nanoscale.

✦ Table of Contents

Dedication
Contents
Preface
Author Biography
1 Introduction
2 Simulation Environment
3 Stress Generation Techniques in CMOS Technology
4 Electronic Properties of Engineered Substrates
5 Bulk-Si FinFETs
6 Strain-Engineered FinFETs at NanoScale
7 Technology CAD of III-Nitride Based Devices
8 Strain-Engineered SiGe Channel TFTs for Flexible Electronics
Index

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