✦ LIBER ✦

Simulation of junctionless Si nanowire transistors with 3 nm gate length

✍ Scribed by Ansari, Lida; Feldman, Baruch; Fagas, Giorgos; Colinge, Jean-Pierre; Greer, James C.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Electrical characteristics of 20-nm junc

✍ Chan-Hoon Park; Myung-Dong Ko; Ki-Hyun Kim; Rock-Hyun Baek; Chang-Woo Sohn; Chan 📂 Article 📅 2012 🏛 Elsevier Science 🌐 English ⚖ 802 KB

Scaling of Trigate Junctionless Nanowire

✍ Barraud, S.; Berthome, M.; Coquand, R.; Casse, M.; Ernst, T.; Samson, M.-P.; Per 📂 Article 📅 2012 🏛 IEEE 🌐 English ⚖ 484 KB

Si nanowire ion-sensitive field-effect t

✍ Nishiguchi, Katsuhiko; Clement, Nicolas; Yamaguchi, Toru; Fujiwara, Akira 📂 Article 📅 2009 🏛 American Institute of Physics 🌐 English ⚖ 579 KB

Performance of 2 nm gate length carbon n

✍ Alam, Khairul; Lake, Roger 📂 Article 📅 2005 🏛 American Institute of Physics 🌐 English ⚖ 461 KB

Electrical characterization of Si nanowi

✍ Soshi Sato; Hideyuki Kamimura; Hideaki Arai; Kuniyuki Kakushima; Parhat Ahmet; K 📂 Article 📅 2010 🏛 Elsevier Science 🌐 English ⚖ 647 KB

Low-temperature poly-Si nanowire junctio

✍ Chun-Jung Su, Tzu-I Tsai, Horng-Chih Lin, Tiao-Yuan Huang, Tien-Sheng Chao 📂 Article 📅 2012 🏛 Springer-Verlag 🌐 English ⚖ 300 KB