Fabrication of strained silicon on insulator (sSOI) substrates by wafer bonding and layer splitting is described in this paper. The sSi layer of 20 nm thickness is obtained on an 8 in. virtual substrate that consists of a plastically relaxed SiGe layer grown epitaxially on Si(0 0 1) by chemical vapo
SiGe HBTs on bonded wafer substrates
β Scribed by S Hall; A.C Lamb; M Bain; B.M Armstrong; H Gamble; H.A.W El Mubarek; P Ashburn
- Publisher
- Elsevier Science
- Year
- 2001
- Tongue
- English
- Weight
- 241 KB
- Volume
- 59
- Category
- Article
- ISSN
- 0167-9317
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β¦ Synopsis
Silicon germanium (SiGe) heterojunction transistors have been fabricated on bonded wafer, silicon-on-insulator (SOI) substrates. The devices have application in low power, radio-frequency electronics. The bonded wafer substrates incorporate poly-Si filled, deep trenches for isolation. A novel selective and non-selective low pressure chemical vapour deposition (LPCVD) growth process was used for the epitaxial layers. Experimental transistors exhibit good uniformity across the wafers and collector currents are seen to be ideal, showing the expected enhancement for the SiGe devices compared to Si. Anomalies in device characteristics at high current levels are investigated.
π SIMILAR VOLUMES
In this article, the influence of base resistance on extracting thermal resistance for SiGe heterojunction bipolar transistors is studied and an improved approach for determining the junction temperature and thermal resistance is presented. The proposed method for extracting thermal resistance is ba