<p><p>This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet r
Reconfigurable networks-on-chip
โ Scribed by Sao-Jie Chen, Ying-Cherng Lan, Wen-Chung Tsai, Yu-Hen Hu (auth.)
- Publisher
- Springer-Verlag New York
- Year
- 2012
- Tongue
- English
- Leaves
- 205
- Edition
- 1
- Category
- Library
No coin nor oath required. For personal study only.
โฆ Synopsis
This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.
- Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip;
- Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues;
- Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC.
From the Foreword:
Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.
--Giovanni De Micheli
โฆ Table of Contents
Front Matter....Pages i-xiii
Front Matter....Pages 1-1
Communication Centric Design....Pages 3-13
Preliminaries....Pages 15-31
Front Matter....Pages 33-33
Techniques for High Performance Noc Routing....Pages 35-50
Performance-Energy Tradeoffs for Noc Reliability....Pages 51-67
Energy-Aware Task Scheduling for Noc-Based DVS System....Pages 69-88
Front Matter....Pages 89-89
Bidirectional Noc Architecture....Pages 91-135
Quality-of-Service in BiNoc....Pages 137-156
Fault Tolerance in BiNoC....Pages 157-171
Energy-Aware Application Mapping for BiNoC....Pages 173-192
Concluding Remarks....Pages 193-194
Back Matter....Pages 195-203
โฆ Subjects
Circuits and Systems; Processor Architectures
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