<p><P>Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dis
Power-Constrained Testing Of Vlsi Circuits
β Scribed by Richard J. Peterson
- Publisher
- McGraw-Hill Companies
- Year
- 2000
- Tongue
- English
- Leaves
- 191
- Series
- Frontiers in Electronic Testing
- Edition
- 1st
- Category
- Library
No coin nor oath required. For personal study only.
β¦ Synopsis
This book focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the very large scale integrated (VLSI) design flow. After a survey of existing techniques for power constrained testing of VLSI circuits, several test automation techniques are presented for reducing power in scan-based sequential circuits and BIST data paths. Nicolici is affiliated with McMaster University, Canada. Al-Hashimi is affiliated with the University of Southampton, UK.
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