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Parallel testing of parametric faults in a three-dimensional dynamic random-access memory

✍ Scribed by Mazumder, P.

Book ID
119774263
Publisher
IEEE
Year
1988
Tongue
English
Weight
867 KB
Volume
23
Category
Article
ISSN
0018-9200

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Parallel testing of parametric faults in
Parallel testing of parametric faults in a three-dimensional dynamic random-access memory: P Mazumder (Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA) IEEE J. Solid State Circuits (USA), vol. 23, no. 4, pp. 933–941 (Aug. 1988)
πŸ“‚ Article πŸ“… 1988 πŸ› Elsevier Science 🌐 English βš– 99 KB

A testable design of dynamic random-access memory (DRAM) architecture which allows one to access multiple cells in a word line simultaneously is presented. The technique utilises the two-dimensional (2-D) organisation of the DRAM and the resulting speedup of the conventional algorithm is considerabl