𝔖 Bobbio Scriptorium

✦ LIBER ✦

Optimal Worst Case Formulas Comparing Cache Memory Associativity

✍ Scribed by Lennerstad, Hakan; Lundberg, Lars

Book ID: 118177570
Publisher: Society for Industrial and Applied Mathematics
Year: 2000
Tongue: English
Weight: 383 KB
Volume: 30
Category: Article
ISSN: 0097-5397
DOI: 10.1137/s0097539798349164

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

A 1-V 128-kb four-way set-associative CM

A 1-V 128-kb four-way set-associative CMOS cache memory using wordline-oriented tag-compare (WLOTC) structure with the content-addressable-memory (CAM) 10-transistor tag cell

✍ Perng-Fei Lin; Kuo, J.B. 📂 Article 📅 2001 🏛 IEEE 🌐 English ⚖ 220 KB

A 0.8-V 128-kb four-way set-associative

A 0.8-V 128-kb four-way set-associative two-level CMOS cache memory using two-stage wordline/bitline-oriented tag-compare (WLOTC/BLOTC) scheme

✍ Perng-Fei Lin; Kuo, J.B. 📂 Article 📅 2002 🏛 IEEE 🌐 English ⚖ 407 KB