A 1-V 128-kb four-way set-associative CMOS cache memory using wordline-oriented tag-compare (WLOTC) structure with the content-addressable-memory (CAM) 10-transistor tag cell

✍ Scribed by Perng-Fei Lin; Kuo, J.B.

• Book ID: 119775841
• Publisher: IEEE
• Year: 2001
• Tongue: English
• Weight: 220 KB
• Volume: 36
• Category: Article
• ISSN: 0018-9200
• DOI: 10.1109/4.913745