𝔖 Bobbio Scriptorium

✦ LIBER ✦

On masking of redundant faults in synchronous sequential circuits with design-for-testability logic

✍ Scribed by Pomeranz, I.; Reddy, S.M.

Book ID: 117907281
Publisher: IEEE
Year: 2005
Tongue: English
Weight: 338 KB
Volume: 24
Category: Article
ISSN: 0278-0070
DOI: 10.1109/tcad.2004.840551

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

On generating tests that avoid the detec

On generating tests that avoid the detection of redundant faults in synchronous sequential circuits with full scan

✍ Pomeranz, I.; Reddy, S.M. 📂 Article 📅 2006 🏛 IEEE 🌐 English ⚖ 1001 KB

[IEEE Comput. Soc 14th International Con

[IEEE Comput. Soc 14th International Conference on VLSI Design - Bangalore, India (3-7 Jan. 2001)] VLSI Design 2001. Fourteenth International Conference on VLSI Design - Testable design of sequential circuits with improved fault efficiency

✍ Das, D.K.; Bhattacharya, B.B.; Ohtake, S.; Fujiwara, H. 📂 Article 📅 2001 🏛 IEEE Comput. Soc ⚖ 563 KB