✦ LIBER ✦

Layer assignment for VLSI interconnect delay minimization

✍ Scribed by Ciesielski, M.J.

No coin nor oath required. For personal study only.

📜 SIMILAR VOLUMES

Layer assignment for VLSI interconnect d

📂 Article 📅 1990 🏛 Elsevier Science 🌐 English ⚖ 177 KB

Minimization of delay and crosstalk in h

✍ Zhang, Q.-J.; Lum, S.; Nakhla, M.S. 📂 Article 📅 1992 🏛 IEEE 🌐 English ⚖ 791 KB

Using well-solvable quadratic assignment

✍ Ben Emanuel; Shmuel Wimer; Gershon Wolansky 📂 Article 📅 2012 🏛 Elsevier Science 🌐 English ⚖ 900 KB

An improved Elmore delay model for VLSI

✍ Mutlu Avci; Serhan Yamacli 📂 Article 📅 2010 🏛 Elsevier Science 🌐 English ⚖ 512 KB

Optimization of interconnect thickness f

✍ Shobha Gupta; O.P. Wadhawan 📂 Article 📅 1991 🏛 Elsevier Science 🌐 English ⚖ 235 KB

A reconfiguration algorithm for delay mi

✍ Donatella Sciuto 📂 Article 📅 1987 🏛 Elsevier Science ⚖ 421 KB