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[IEEE NUPAD IV. Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits, - Seattle, WA (May 31-June 1, 1992)] NUPAD IV. Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits, - BTU - Berkeley Topography Utilities for Linking Topography and Impurity Profile Simulations

✍ Scribed by Wang, R.H.; Gabara, A.; Neurether, A.

Book ID: 126657816
Publisher: IEEE
Year: 1992
Weight: 569 KB
Category: Article
ISBN-13: 9780780305168
DOI: 10.1109/NUPAD.1992.674109

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