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[IEEE ESSDERC 2003. 33rd European Solid-State Device Research - ESSDERC '03 - Estoril, Portugal (16-18 Sept. 2003)] Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) - Influence of gate width on 50 nm gate length Si/sub 0.7/Ge/sub 0.3/ channel PMOSFETs

✍ Scribed by von Haartman, M.; Lindgren, A.-C.; Hellstrom, P.-E.; Ostling, M.; Ernst, T.; Brevard, L.; Deleonibus, S.

Book ID: 121816028
Publisher: IEEE
Year: 2003
Tongue: English
Weight: 248 KB
Category: Article
ISBN-13: 9780780379992
DOI: 10.1109/ESSDERC.2003.1256930

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