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[IEEE Comput. Soc. Press European Design and Test Conference - Paris, France (11-14 March 1996)] Proceedings ED&TC European Design and Test Conference - FPGA synthesis for minimum area, delay and power

✍ Scribed by Pan, K.-R.R.; Pedram, M.

Book ID: 126706582
Publisher: IEEE Comput. Soc. Press
Year: 1996
Weight: 127 KB
Category: Article
ISBN-13: 9780818674235
DOI: 10.1109/EDTC.1996.494367

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