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[IEEE 2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Warsaw, Poland (2014.4.23-2014.4.25)] 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - A design of an area-efficient 10-GHz phase-locked loop for source-synchronous, multi-channel links in 90-nm CMOS technology

✍ Scribed by Bae, Woorham; Jeong, Deog-Kyoon; Yoo, Byoung-Joo

Book ID: 125885830
Publisher: IEEE
Year: 2014
Weight: 1023 KB
Category: Article
ISBN: 1479945609
DOI: 10.1109/DDECS.2014.6868763

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